Software Release
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May 1, 2018: Vincent Platform v2.5.7 major release
By vsyncc on April 30, 201800We are glad to inform our customer on the official release of v2.5.7 Please contact your vSync POC / distributor in case you don’t have access to the new release. The new version is aligned to the latest Xilinx and Altera SW releases. -
July 15, 2014: vSBUS IP announcement for low- and high-end FPGA and ASIC designs
vSync Circuits is happy to announce the release of new vSBUS IP. The new IP supports simple bus interface (SBUS) on host side and a configurable number of user ports on the other side. Similarly to vAXIom platform, vSBUS generation is accompanied by generation of customized simulation and synthesis environments. vSBUS and vAXI are compatible IPs, supporting user setting (port settings) transfer […] -
June 15, 2014: vAxiom Platform v3.5 release
vSync Circuits is happy to announce the release of vAXIom Platform v3.5. The new platform enables extended simulation and synthesis environment abilities. For a detailed list of new features please refer to the release notes supplied with this version (for registered customers) or contact vSync Circuits support. About vAXIom platform: vAXIom platform enables fast and reliable integration over AXI bus, providing […] -
May. 31, 2013: Vincent Platform v2.4 major release
We are happy to announce major release, v2.4 The customers are invited to review the release notes inside the distributed release pack. -
Dec. 31, 2012: Vincent Platform v2.2 was released
Dec. 31, 2012: v2.2 was released -
Jan. 31, 2012: v2.10 was released
Jan. 31, 2012: v2.10 was released -
Aug. 31, 2011: v2.05 was released
Aug. 31, 2011: v2.05 was released
vSync Circuits
Our Products
vSync Circuits delivers a variety of EDA and IP solutions for ASIC and FPGA verification and integration. vSync Circuits CDC verification is comple-mented by vSync Circuits intellectual property (IP) cores portfolio with multiple highly configurable fool-proof synchronizers, enabling not only CDC analysis, but also multiple clock domain design integration and bug-fix. In addition to the static analysis, vSync Circuits platforms support different ASIC and FPGA design flows, including ASIC and FPGA simulations at RTL and gate-level. vSync Circuits EDA tools enable fast design timing analysis, design reliability assessment (MTBF) and an automated bug fixing.
About vSync Circuits
vSync Circuits is an EDA and IP solutions company, providing integration and verification solutions for ASIC and FPGA design and verification groups. The company introduces a novel and unique technology for reliable multiple clock-domain design integration and CDC verification, comprising of a tool-based approach, which bridges the design and verification worlds. vSync Circuits methodology is based on the concept of combined employment of structural and formal verification, RTL and gate-level verification, automatic timing constraints generation and an automatic bug-fix. vSync Circuits methodology is generic and is compatible with both FPGA and ASIC verification and integration flows.