Dear customers, We are pleased to announce that vSync has extended its support for Microchip designs. The new Vincent Platform v2.6.3 release (vChecker / vLinter) allows a more extended automatic support for Microchip IPs than in previous versions. The vChecker/vLinter projects can automatically set up CDC/LINT environment by loading Libero project. The Microchip IP blocks are automatically recognized and analyzed. […]

We are glad to inform our customer on the official release of v2.5.7 Please contact your vSync POC / distributor in case you don’t have access to the new release. The new version is aligned to the latest Xilinx and Altera SW releases.    

vSync Circuits is happy to announce the release of new vSBUS IP. The new IP supports simple bus interface (SBUS) on host side and a configurable number of user ports on the other side. Similarly to vAXIom platform, vSBUS generation is accompanied by generation of customized simulation and synthesis environments. vSBUS and vAXI are compatible IPs, supporting user setting (port settings) transfer […]

vSync Circuits is happy to announce the release of vAXIom Platform v3.5. The new platform enables extended simulation and synthesis environment abilities. For a detailed list of new features please refer to the release notes supplied with this version (for registered customers) or contact vSync Circuits support.   About vAXIom platform: vAXIom platform enables fast and reliable integration over AXI bus, providing […]

We are happy to announce major release, v2.4 The customers are invited to review the release notes inside the distributed release pack.  

Dec. 31, 2012: v2.2 was released

Jan. 31, 2012: v2.10 was released

Aug. 31, 2011: v2.05 was released