Synchronization failures are a common pitfall in multiple clock domain designs. These bugs are hard to fix, because the failures are often intermittent and hard to catch. Fixing such bugs in FPGA may take weeks of debugging, and they may be impossible to catch in ASIC prior to fabrication.
vSync Circuits Vincent Platform delivers a twofold solution to this problem. The vGenerator tool provides the necessary fool-proof synchronizer customized for each interface and each clock domain crossing. The vChecker tool verifies the complete design statically, hunting for trouble and assessing expected reliability.
Unlike typical clock domain crossing (CDC) verification tools, the vSync Circuits Vincent Platform focuses on providing the correct solutions, rather than merely pointing at the problems. Vincent Platform is compatible with all types of digital design flow, having a fast and easy deployment.
The advanced abilities of vSync Circuits Vincent Platorm provide a complete solution for multiple clock domain ASIC/FPGA integration and CDC verification, covering all the stages of the VLSI design flow: from the RTL design down to GDSII/Bitsream.
~ Israel Samuha, FPGA Group Manager, Rafael
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vSync Circuits is an EDA and IP solutions company, providing integration and verification solutions for ASIC and FPGA design and verification groups. The company introduces a novel and unique technology for reliable multiple clock-domain design integration and CDC verification, comprising of a tool-based approach, which bridges the design and verification worlds. vSync Circuits methodology is generic and is compatible with all different design flows.